Summary of Research Project Results under JSPS FY2003
"Research for the Future Program"

1.Research Institution Himeji Institute of Technology
2.University-Industry Cooperative Research Committee 145th Committee on Processing and Characterization of Crystals
3.Term of Project FY 1999 - FY 2003
4.Project Number 99R14501
5.Title of Project Ultimate Characterization Technique of SOI Wafer for the Nano-scale LSI Devices

6.Project Leader
Name InstitutionCDepartment Title of Position
Seigo,Kishino Himeji Institute of Technology, Graduate School of Engineering Professor

7.Core Members

Names Institution,Department Title of Position
Michio,Tajima Japan Aerospace Exploration Agency,
Institute of Space and Astronautical Science

8.Summary of Research Results

   In this research project we targeted the development of the novel characterization techniques of ultra-thin SOI wafers. They must be available for both electrical and physical characterization of thin SOI wafers. In addition, we aimed at developing a gettering technique for SOI wafers. This was needed because the conventional gettering procedures used in bulk Si wafers are not applicable to an SOI wafer in which a BOX (buried oxide) layer hinders the gettering action as a diffusion barrier against harmful heavy metal impurities.
   We developed the following according to the targets described above. 1) a scanning charge pumping method obtainable interface trap densities of a thin SOI wafer without using contact electrodes for individual devices 2) a novel MOS„C-V method using a back bias voltage applicable to thin SOI wafers 3) a nano-area C-V method using scanning capacitance microscopy 4) Kelvin-probe„SPV method applicable to the SOI wafers contaminated with heavy metal impurities such as iron 5) photoluminescence mapping equipment applicable to 300 mm diameter SOI wafers 6) a local and wide area X-ray diffraction technique in which we observed a faint strain peculiar to thin SOI wafers, and 7) a novel gettering technique, in which polycrystalline silicon film deposited on an SOI surface is utilized for the gettering procedure and the film is eliminated after the gettering. The technique has been examined using test devices in the LSI production line and their usefulness is verified by the use of char acterization techniques such ascharge pumping techniques and photoluminescence techniques which are developed in the present research project.

9.Key Words
(1)SOI Wafer   (2)Surface & Interface   (3)Semiconductor Material Physics
(4)Characterzation   (5)Electronic properties   (6)Local Analyses
(7)Photoluminescence   (8)Gettering Techniques   (9)X-Ray Diffraction